At present time, chips are mounted in RF-power transistors and RF-power modules by means of a eutectic gold-silicon soldering process. The capsules used are metallised, often with nickel and a relatively thick layer of gold (2-5 .mu.m). The chips (transistors, resistors and capacitors) to be arranged in the capsules are provided with a very thin layer of gold on their bottom surfaces. This gold layer functions to prevent oxidation of the bottom surface of the chip. When using gold-silicon, the capsule is heated to a temperature of 400-450.degree. C. and chips are then placed individually against the capsule and rubbed or scrubbed forwards and backwards until an alloy is formed between the silicon in the chip and the gold on the capsule. It is not possible to determine precisely the point at which this alloy begins to form. This step in the process is therefore normally carried out manually, so that an operator will be able to observe when an alloy has been formed and effective soldering has been achieved.
Although all the gold present on the capsule (beneath the chip) is consumed in this soldering process, there remains a large silicon surplus in the chip. This surplus of silicon can migrate into the molten AuSi alloy and there precipitate out in the form of Si-crystals. This process is accelerated at elevated temperatures and also when mechanical rubbing, or scrubbing, is vigorous. Consequently, it is not suitable/possible to effect this scrubbing process mechanically or with ultrasound, since an excessively large amount of Si-crystals will then collect in the molten AuSi alloy. Drawbacks with an excessively large amount of Si-crystals in the molten alloy is that the melt obtains a viscous consistency and will not therefore flow outwards and effectively wet the surface.
These silicon crystals will effectively enclose any air bubbles that may have formed between chip and capsule. Such bubbles drastically impair the thermal conductivity between the chip and the capsule. The total thickness of an AuSi alloy joint formed by the gold on the capsule and the silicon in the chip can never be more than about 50% greater than the thickness of the gold. Thus, when the gold has a thickness of 4 .mu.m, the joint will only have a thickness of about 6 .mu.m. This places high demands on the surface flatness or smoothness of the capsule, since otherwise solder deficiencies between chip and capsule may arise.
It is generally known that additional AuSi solder can be applied between chip and capsule in the way of a preform. This is very often difficult and expensive to achieve, due to the small dimensions of such preforms. It is not possible in practice to work with preforms that have a material thickness smaller than about 25 .mu.m. A joint of this thickness, however, will increase the thermal resistance between chip and capsule to an unacceptable degree.